VLSI DSP Architectures and Applications

A data ow and control ow model is presented for use in high level synthesis of eecient time multiplexed architectures targeted towards real-time DSP systems. The model is an extension to the polyhedral models used in array synthesis techniques. The model features a mathematical description of dependencies between individual operations and signal instances of multi-dimensional signals for algorithms that can be described by Conditional AAne Recurrence Equations. It allows for a generalization of high level control ow transformations and their steering by eecacious optimization methods. The inherent amenity of this type of model for these tasks is motivated by examples. Important tasks in high level synthesis that can exploit this model are memory management for time multiplexed architectures and non-linear transformations for array architectures, but also other tasks may beneet. The former task will be described in more detail in this paper. Performance gures of a CAD tool implementing the model extraction demonstrates the feasibility of this approach for the envisaged application domain.